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 October 1997
FDC6302P Digital FET, Dual P-Channel
General Description
These Dual P-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors in load switchimg applications. Since bias resistors are not required this one P-Channel FET can replace several digital transistors with different bias resistors like the IMBxA series.
Features
-25 V, -0.12 A continuous, -0.5 A Peak. R DS(ON) = 13 @ VGS= -2.7 V R DS(ON) = 10 @ VGS = -4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.5V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Replace multiple PNP digital transistors (IMHxA series) with one DMOS FET.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
4
3
5
2
6
1
Absolute Maximum Ratings
Symbol VDSS VGSS ID PD TJ,TSTG ESD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current
TA = 25oC unless other wise noted FDC6302P -25 -8 Units V V A
- Continuous - Pulsed
-0.12 -0.5
(Note 1a) (Note 1b)
Maximum Power Dissipation
0.9 0.7 -55 to 150 6.0
W
Operating and Storage Temperature Range Electrostatic Discharge Rating MIL-STD-883D Human Body Model (100pf / 1500 Ohm)
C kV
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
140 60
C/W C/W
FDC6302P Rev.C
(c) 1997 Fairchild Semiconductor Corporation
Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A ID = -250 A, Referenced to 25 o C VDS = -20 V, VGS = 0 V TJ = 55C IGSS Gate - Body Leakage Current
(Note 2)
-25 -20 -1 -10 -100
V mV /o C A A nA mV /o C -1.5 13 10 18 A 0.135 S V
BVDSS/TJ
IDSS
VGS = -8 V, VDS= 0 V ID = -250 A, Referenced to 25 o C VDS = VGS, ID = -250 A VGS = -2.7 V, ID = -0.05A VGS = -4.5 V, ID = -0.2 A TJ =125C -0.65 1.9 -1 10.6 7.9 12 -0.05
ON CHARACTERISTICS
VGS(th)/TJ
VGS(th) RDS(ON)
Gate Threshold Voltage Temp. Coefficient Gate Threshold Voltage Static Drain-Source On-Resistance
ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd IS VSD
On-State Drain Current Forward Transconductance
VGS = -2.7 V, VDS = -5 V VDS = -5 V, ID= -0.2 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz
DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
11 7 1.4
pF pF pF
SWITCHING CHARACTERISTICS Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = -6 V, ID = -0.2 A, VGS = -4.5 V, RGEN = 50
5 8 9 5
12 16 18 10 0.31
ns ns ns ns nC nC nC
VDS = -5 V, ID = - 0.2 A, VGS = -4.5 V
0.22 0.12 0.05
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.7 A
(Note 2)
-0.7 -1 -1.3
A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a. 140OC/W on a 0.125 in2 pad of 2oz copper.
b. 180OC/W on a 0.005 in2 of pad of 2oz copper.
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
FDC6302P Rev.C
Typical Electrical Characteristics
0.2 2
-I D , DRAIN-SOURCE CURRENT (A)
V GS = -5.0V -4.5
0.15
-4.0 -3.5
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-3.0 -2.7
V GS = -2.0 V
1.5
-2.5 -2.7 -3.0
0.1
-2.5
1
0.05
-2.0
-4.0 -3.5 -4.5
0
0.5 0 1 2 3 4 -VDS , DRAIN-SOURCE VOLTAGE (V)
0
0.05
0.1 -I D , DRAIN CURRENT (A)
0.15
0.2
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
DRAIN-SOURCE ON-RESISTANCE (OHMS)
,DRAIN-SOURCE ON-RESISTANCE
1.6
25
I D = -0.05A
1.4
R DS(ON) , NORMALIZED
V GS = -2.7V
20
TA= 25C 125 C
ID = -0.05A
1.2
15
1
10
0.8
5
0.6 -50
R DS(ON)
0 0 1 2 3 4 5 6 7 8 -V GS ,GATE TO SOURCE VOLTAGE (V)
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On Resistance Variation with Gate-To- Source Voltage.
-1
0.5
V DS = -5V
I D , DRAIN CURRENT (A)
-0.75
25C 125C
-I , REVERSE DRAIN CURRENT (A)
T = -55C J
VGS = 0V
0.1
T J = 125C 25C
-0.5
0.01
-55C
-0.25
0 -0.5
-1
-1.5 -2 -2.5 V GS , GATE TO SOURCE VOLTAGE (V)
-3
S
0.0001 0 0.2 -V
SD
0.4 0.6 0.8 1 , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDC6302P Rev.C
Typical Electrical And Thermal Characteristics
8 -V GS , GATE-SOURCE VOLTAGE (V)
25
I D = -0.2A
6
VDS = -5V -15
-10
CAPACITANCE (pF)
15 10
C iss Coss
4
5 3 2
2
f = 1 MHz V GS = 0 V
0.3 1 2 5
Crss
10 15 25
0 0 0.1 0.2 0.3 0.4 0.5 Q g , GATE CHARGE (nC)
1 0.1
-V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.8 0.5 -ID , DRAIN CURRENT (A)
) ON LIM IT
1m 10
S(
5
s
4 POWER (W)
m
s
0.2 0.1 0.05
RD
10
0m
s
3
SINGLE PULSE RJA =See note 1b TA = 25C
1s
DC
2
0.02 0.01
VGS = -2.7V SINGLE PULSE R JA =See Note 1b TA = 25C
1 2 5 10 20 40
1
0 0.01
0.1
1
10
100
300
- VDS , DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
1
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
0.5
D = 0.5
0.2 0.1 0.05
0.2 0.1 P(pk) 0.05 0.02 0.01 Single Pulse
RJA (t) = r(t) * R JA R JA = See Note 1b
t1
t2
0.02 0.01 0.0001
TJ - TA = P * R JA(t) Duty Cycle, D = t 1/ t 2
0.01 0.1 t 1, TIME (sec) 1 10 100 300
0.001
Figure 11. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design.
FDC6302P Rev.C


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